Towards an Implementation of OpenMP on the NVIDIA G80 Series Architecture

Paul Keir

Towards an Implementation of OpenMP on the NVIDIA G80 Series Architecture

Research output: Thesis › Master's Thesis

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Abstract

The following dissertation describes the design and creation of an OpenMP C compiler. The compiler targets the parallel capability of a modern series of NVIDIA graphics cards, and the generated output source code is written in the NVIDIA CUDA C language. The project also proposes and implements an extension to the OpenMP language: a single new directive and supporting runtime routines. By this route, problems with pointer indirection in the presence of a dual address space memory architecture are relieved.

Original language	English
Qualification	Master of Science
Awarding Institution	University of Edinburgh
Thesis sponsors	Student Awards Agency For Scotland (SAAS)
Publication status	Published - 23 Aug 2007
Externally published	Yes

Keywords

GPGPU
CUDA
OpenMP
HPC
compilers
parallel processing
heterogeneous hardware

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1329987-27i-d07rep1.1Licence: CC BY-ND

Cite this

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title = "Towards an Implementation of OpenMP on the NVIDIA G80 Series Architecture",

abstract = "The following dissertation describes the design and creation of an OpenMP C compiler. The compiler targets the parallel capability of a modern series of NVIDIA graphics cards, and the generated output source code is written in the NVIDIA CUDA C language. The project also proposes and implements an extension to the OpenMP language: a single new directive and supporting runtime routines. By this route, problems with pointer indirection in the presence of a dual address space memory architecture are relieved.",

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AB - The following dissertation describes the design and creation of an OpenMP C compiler. The compiler targets the parallel capability of a modern series of NVIDIA graphics cards, and the generated output source code is written in the NVIDIA CUDA C language. The project also proposes and implements an extension to the OpenMP language: a single new directive and supporting runtime routines. By this route, problems with pointer indirection in the presence of a dual address space memory architecture are relieved.

KW - GPGPU

KW - CUDA

KW - OpenMP

KW - HPC

KW - compilers

KW - parallel processing

KW - heterogeneous hardware

UR - https://www.epcc.ed.ac.uk/msc/overview/programme-structure/dissertations/2006-2007

M3 - Master's Thesis

ER -

Towards an Implementation of OpenMP on the NVIDIA G80 Series Architecture

Abstract

Keywords

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