Towards an FPGA-Accelerated programmable data path for edge-to-core communications in 5G networks

Ruben Ricart-Sanchez, Pedro Malagon, Pablo Salva Garcia, Enrique Chirivella Perez, Qi Wang, Jose M. Alcaraz Calero

Research output: Contribution to journalArticlepeer-review

24 Citations (Scopus)
561 Downloads (Pure)


The Fifth-Generation (5G) networks, as the emerging next generation mobile networks, are adopting softwarization and virtualization technologies as the cornerstones for the network operators to gain significant competitive advantages by reducing both capital and operational expenditure, enabling agile and flexible service creation and deployment, among others. Meanwhile, a virtualized and softwarized 5G network would suffer from downgraded system performance due to this unprecedented paradigm shift towards software-based networking. Addressing one of the top challenges in this context, this paper focuses on improving the performance of the data plane from the edge to the core network segment (backhaul) in a 5G multi-tenant network by leveraging and exploring the programmability introduced by software-based networking. A fully functional prototype has been designed and implemented utilizing a Field Programmable Gate Arrays (FPGAs) acceleration-based platform, and the prototyped system has been empirically tested and evaluated to demonstrate the superior performance enhancements. The proposed solution can effectively support 5G networks in delivering mission-critical or time-sensitive applications such as ultra-high definition video use cases as experimentally validated and shown in this paper, by fulfilling the strict Quality of Service (QoS) requirements imposed to the data plane.
Original languageEnglish
Pages (from-to)80-93
Number of pages14
JournalJournal of Network and Computer Applications
Early online date25 Sep 2018
Publication statusPublished - 15 Dec 2018


  • Data path
  • FPGA
  • 5G
  • Mobile edge computing
  • Reconfigurable hardware
  • Network architecture and design


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