HLS based hardware acceleration on the zynq SoC: A case study for fall detection system

A. A. S. Ali, M. Siupik, A. Amira, F. Bensaali, Juan Pablo Casaseca

Research output: Chapter in Book/Report/Conference proceedingConference contribution

9 Citations (Scopus)

Abstract

Fall detection is a major problem in healthcare systems, especially for elderly people who are the most vulnerable. It is important to design and implement not only an accurate fall detection system (FDS) but also a system with a real-time response. The achievement of high accuracy and fast response time together allows the development of a system that helps saving lives, time and money in healthcare industry. This paper presents the design, simulation and implementation of a novel FDS using the Shimmer wearable sensor. The discrete wavelet transform (DWT) is applied for preprocessing the data coming from the Shimmer platform, principal component analysis (PCA) is used for dimensionality reduction and feature extraction and finally, a binary decision tree (DT) is utilized for classification purpose. The system is simulated in MATLAB prior to the implementation on the Zynq system-on-chip (SoC) for hardware acceleration. DWT is executed on the processing system (PS) of the Zynq platform in a software manner while PCA and DT are both implemented on the programmable logic (PL) for hardware acceleration. PCA and DT are developed in C and synthesized in Vivado high level synthesis (HLS) tool to transform the C based designed into a register transfer level (RTL) implementation. Various optimization techniques are explored in Vivado HLS. The performance of the FDS in terms of accuracy of the classifier is 88.4% while the overall resources used in PL of the Zynq vary between 2% and 23% depending on the running frequency and optimization technique used.
Original languageEnglish
Title of host publicationIEEE/ACS 11th International Conference on Computer Systems and Applications (AICCSA), 2014
PublisherIEEE
Pages685-690
Number of pages6
ISBN (Print)9781479971008
DOIs
Publication statusPublished - 2014

Keywords

  • assisted living
  • discrete wavelet transforms
  • feature extraction
  • geriatrics
  • high level synthesis
  • principal component analysis
  • system-on-chip
  • DWT
  • FDS
  • HLS based hardware acceleration
  • PCA
  • RTL implementation
  • Shimmer platform
  • Shimmer wearable sensor
  • Vivado HLS tool
  • Vivado high level synthesis tool
  • Zynq SoC
  • Zynq system-on-chip
  • binary DT
  • binary decision tree
  • dimensionality reduction
  • discrete wavelet transform
  • elderly people
  • fall detection system
  • healthcare industry
  • healthcare systems
  • programmable logic
  • real-time response system
  • register transfer level implementation
  • Acceleration
  • Decision trees
  • Hardware
  • Training
  • decision tree classifier

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  • Cite this

    Ali, A. A. S., Siupik, M., Amira, A., Bensaali, F., & Casaseca, J. P. (2014). HLS based hardware acceleration on the zynq SoC: A case study for fall detection system. In IEEE/ACS 11th International Conference on Computer Systems and Applications (AICCSA), 2014 (pp. 685-690). IEEE. https://doi.org/10.1109/AICCSA.2014.7073266