Distributed Arithmetic Architecture of Discrete Wavelet Transform (DWT) with Hybrid Method

Noor Huda Ja'afar; Afandi Ahmad; Abbes Amira

doi:10.1109/ICECS.2013.6815463

Distributed Arithmetic Architecture of Discrete Wavelet Transform (DWT) with Hybrid Method

Noor Huda Ja'afar, Afandi Ahmad, Abbes Amira

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

5 Citations (Scopus)

Abstract

This paper presents the design and implementation of distributed arithmetic (DA) architectures of three-dimensional (3-D) Discrete Wavelet Transform (DWT) with hybrid method for medical image compression. Due to the separability property of the multi-dimensional Haar and Daubechies, the proposed architecture has been implemented using a cascade of three N-point one-dimensional (1-D) Haar/Daubechies and two transpose memories for a 3-D volume of NxNxN, suitable for 3-D medical imaging applications. The architectures were synthesised using VHDL and G-code and implemented on field programmable gate array (FPGA) single board RIO (sbRIO-9632) with Spartan-3 (XC3S2000). Experimental results and an analysis of the area, power consumption, maximum frequency, latency, throughput as well as the subjective test are discussed in this paper.

Original language	English
Title of host publication	2013 IEEE 20TH INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS, AND SYSTEMS (ICECS)
Publisher	IEEE
ISBN (Print)	978-1-4799-2452-3
DOIs	https://doi.org/10.1109/ICECS.2013.6815463
Publication status	Published - 2013

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Name	IEEE International Conference on Electronics, Circuits and Systems

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Cite this

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title = "Distributed Arithmetic Architecture of Discrete Wavelet Transform (DWT) with Hybrid Method",

abstract = "This paper presents the design and implementation of distributed arithmetic (DA) architectures of three-dimensional (3-D) Discrete Wavelet Transform (DWT) with hybrid method for medical image compression. Due to the separability property of the multi-dimensional Haar and Daubechies, the proposed architecture has been implemented using a cascade of three N-point one-dimensional (1-D) Haar/Daubechies and two transpose memories for a 3-D volume of NxNxN, suitable for 3-D medical imaging applications. The architectures were synthesised using VHDL and G-code and implemented on field programmable gate array (FPGA) single board RIO (sbRIO-9632) with Spartan-3 (XC3S2000). Experimental results and an analysis of the area, power consumption, maximum frequency, latency, throughput as well as the subjective test are discussed in this paper.",

author = "Ja'afar, {Noor Huda} and Afandi Ahmad and Abbes Amira",

year = "2013",

doi = "10.1109/ICECS.2013.6815463",

language = "English",

isbn = "978-1-4799-2452-3",

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address = "United States",

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Distributed Arithmetic Architecture of Discrete Wavelet Transform (DWT) with Hybrid Method. / Ja'afar, Noor Huda; Ahmad, Afandi; Amira, Abbes.
2013 IEEE 20TH INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS, AND SYSTEMS (ICECS). IEEE, 2013. (IEEE International Conference on Electronics, Circuits and Systems).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Distributed Arithmetic Architecture of Discrete Wavelet Transform (DWT) with Hybrid Method

AU - Ja'afar, Noor Huda

AU - Ahmad, Afandi

AU - Amira, Abbes

PY - 2013

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N2 - This paper presents the design and implementation of distributed arithmetic (DA) architectures of three-dimensional (3-D) Discrete Wavelet Transform (DWT) with hybrid method for medical image compression. Due to the separability property of the multi-dimensional Haar and Daubechies, the proposed architecture has been implemented using a cascade of three N-point one-dimensional (1-D) Haar/Daubechies and two transpose memories for a 3-D volume of NxNxN, suitable for 3-D medical imaging applications. The architectures were synthesised using VHDL and G-code and implemented on field programmable gate array (FPGA) single board RIO (sbRIO-9632) with Spartan-3 (XC3S2000). Experimental results and an analysis of the area, power consumption, maximum frequency, latency, throughput as well as the subjective test are discussed in this paper.

AB - This paper presents the design and implementation of distributed arithmetic (DA) architectures of three-dimensional (3-D) Discrete Wavelet Transform (DWT) with hybrid method for medical image compression. Due to the separability property of the multi-dimensional Haar and Daubechies, the proposed architecture has been implemented using a cascade of three N-point one-dimensional (1-D) Haar/Daubechies and two transpose memories for a 3-D volume of NxNxN, suitable for 3-D medical imaging applications. The architectures were synthesised using VHDL and G-code and implemented on field programmable gate array (FPGA) single board RIO (sbRIO-9632) with Spartan-3 (XC3S2000). Experimental results and an analysis of the area, power consumption, maximum frequency, latency, throughput as well as the subjective test are discussed in this paper.

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DO - 10.1109/ICECS.2013.6815463

M3 - Conference contribution

SN - 978-1-4799-2452-3

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BT - 2013 IEEE 20TH INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS, AND SYSTEMS (ICECS)

PB - IEEE

ER -

Distributed Arithmetic Architecture of Discrete Wavelet Transform (DWT) with Hybrid Method

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