TY - JOUR
T1 - Bi-Predictive Motion Estimation for HEVC on a Graphics Processing Unit (GPU)
AU - Radicke, Stefan
AU - Hahn, Jens-uwe
AU - Wang, Qi
AU - Grecos, Christos
PY - 2014/11
Y1 - 2014/11
N2 - High Efficiency Video Coding (HEVC), the latest video compression standard, will play an important role in many multimedia applications in the foreseeable future. Its superior compression performance enables HEVC to be particularly suitable for high-definition videos in consumer electronics environments; however, it comes with the price of substantially high computational complexity. The HEVC encoding process, especially the Motion Estimation (ME), is very time consuming, which makes HEVC impractical for real-time applications at the moment. In this work, a hybrid encoding architecture with a set of algorithms is proposed, exploring a Graphics Processing Unit (GPU) to perform both uni-predictive and bi-predictive ME in a highly parallel manner. This reduces the complexity of the uni- and bipredictive ME on the Central Processing Unit (CPU) by up to 99% and 95% respectively, and brings significant overall time savings of up to 57.65% and 54.16% for the low delay P and the random access coding configurations respectively. The Rate-Distortion (RD) performance is only marginally affected in both cases.
AB - High Efficiency Video Coding (HEVC), the latest video compression standard, will play an important role in many multimedia applications in the foreseeable future. Its superior compression performance enables HEVC to be particularly suitable for high-definition videos in consumer electronics environments; however, it comes with the price of substantially high computational complexity. The HEVC encoding process, especially the Motion Estimation (ME), is very time consuming, which makes HEVC impractical for real-time applications at the moment. In this work, a hybrid encoding architecture with a set of algorithms is proposed, exploring a Graphics Processing Unit (GPU) to perform both uni-predictive and bi-predictive ME in a highly parallel manner. This reduces the complexity of the uni- and bipredictive ME on the Central Processing Unit (CPU) by up to 99% and 95% respectively, and brings significant overall time savings of up to 57.65% and 54.16% for the low delay P and the random access coding configurations respectively. The Rate-Distortion (RD) performance is only marginally affected in both cases.
U2 - 10.1109/TCE.2014.7027349
DO - 10.1109/TCE.2014.7027349
M3 - Article
SN - 0098-3063
VL - 60
SP - 728
EP - 736
JO - IEEE Transactions on Consumer Electronics
JF - IEEE Transactions on Consumer Electronics
IS - 4
ER -