An FPGA implementation of the matching pursuit algorithm for a compressed sensing enabled e-health monitoring platform

Oussama Kerdjidj , Abbes Amira, Khalida Ghanem, Naeem Ramzan, Stamos Katsigiannis, Fatima Chouireb

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Abstract

Wireless monitoring of physiological signals is an evolving direction in personalized medicine and home-based e-Health systems. There are several constraints in designing such systems, with two of the most important being energy consumption and data compression. Compressed Sensing (CS) is an emerging data compression technique that can be used to overcome those constraints. This work presents a low-complexity CS hardware implementation on a Field-Programmable Gate Array (FPGA) for the reconstruction of compressively sensed signals using the matching pursuit (MP) algorithm, targeting health-care applications. The proposed hardware design is based on pipeline optimization of the Programmable Logic (PL) implementation performed on the Zynq FPGA, which provides a significant performance enhancement, namely an increased processing speed and a reduced computational time since it is 115x faster than the Matlab implementation and 75x faster than the Processing System (PS) implementation carried out on the same Zynq FPGA device, while achieving alternative a high-quality signal recovery with a Peak Signal to Noise Ratio (PSNR) of 23.8 dB. Comparisons against other state-of-the-art methods showed that the low complexity of the MP algorithm can be exploited for providing almost similar results to more complex algorithms using 87 to 583 less Digital Signal Processor (DSP) cores, 28 to 540 less Block RAMs and 10300 to 84700 less Look-Up Table (LUT) slices.
Original languageEnglish
Pages (from-to)131-139
Number of pages9
JournalMicroprocessors and Microsystems
Volume67
Early online date27 Mar 2019
DOIs
Publication statusPublished - 30 Jun 2019

Keywords

  • Compressed sensing
  • ECG
  • Hardware implementation
  • Low complexity
  • Matching pursuit
  • Zybo board

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