Abstract
This work aims to propose an efficient hardware/software system fo guassian mixture model (GMM) parts-based topology modeling for face identification and verification. Following its great success in speaker recognition, The GMM approach was extended to face recognition providing a good trade-off in terms of complexity, performance and robustness. Despite its reduced complexity compared to other statistical modeling techniques like hiden markov model (HMM) and its variants. The GMM scoring module still to be computationally intensive algorithm consisting of a series of complex tasks executed in sequential order. This constraint limits its suitability for real-time pattern recognition embedded applications. This paper presents an efficient hardware implementation of embedded GMM based classifier. Reconfigurable system in the form of field programmable gate arrays (FPGA) is deployed to embed the hardware part of the proposed system. Furthermore a design of exponential calculation circuit is proposed for the best compromise between effectiveness and complexity. Approximations are also developed to reduce the hardware complexity. The developed system performs the identification process of an unknown input pattern over 200 models in 23 seconds, our performance evaluation indicates that a speedup of around 5.1X can be achieved over an optimized software implementation running on a 33GHz core i3 processor. A results precision of 10(-2) is obtained after performing the GMM calculation using the proposed hardware/software system.
Original language | English |
---|---|
Title of host publication | 2013 8TH INTERNATIONAL WORKSHOP ON SYSTEMS, SIGNAL PROCESSING AND THEIR APPLICATIONS (WOSSPA) |
Publisher | IEEE |
Pages | 367-371 |
Number of pages | 5 |
ISBN (Print) | 978-1-4673-5540-7 |
DOIs | |
Publication status | Published - 2013 |
Keywords
- FPGA
- Face recognition
- GMM
- Reconfigurable architectures
- Embedded systems